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ISL5120, ISL5121, ISL5122, ISL5123
Data Sheet February 2003 FN6022.5
Low-Voltage, Single Supply, Dual SPST, SPDT Analog Switches
The Intersil ISL5120-ISL5123 devices are precision, bidirectional, dual analog switches designed to operate from a single +2.7V to +12V supply. Targeted applications include battery powered equipment that benefit from the devices' low power consumption (5W), low leakage currents (100pA max), and fast switching speeds (tON = 28ns, tOFF = 20ns). Cell phones, for example, often face ASIC functionality limitations. The number of analog input or GPIO pins may be limited and digital geometries are not well suited to analog switch performance. This family of parts may be used to "muxin" additional functionality while reducing ASIC design risk. Some of the smallest packages are available, alleviating board space limitations, and making Intersil's newest line of low-voltage switches an ideal solution. The ISL5120/ISL5121/ISL5122 are dual single-pole/singlethrow (SPST) devices. The ISL5120 has two normally open (NO) switches; the ISL5121 has two normally closed (NC) switches; the ISL5122 has one NO and one NC switch and can be used as an SPDT. The ISL5123 is a committed SPDT, which is perfect for use in 2-to-1 multiplexer applications.
TABLE 1. FEATURES AT A GLANCE ISL5120 Number of Switches SW 1 / SW 2 3.3V RON 3.3V tON / tOFF 5V RON 5V tON / tOFF 12V RON 12V tON / tOFF Packages 8 Ld SOIC, 8 Ld SOT-23, 8 Ld MSOP 11 25ns / 17ns 19 28ns / 20ns 2 NO / NO 32 40ns /20ns ISL5121 2 NC / NC 32 40ns /20ns 19 28ns / 20ns 11 25ns / 17ns ISL5122 2 NO / NC 32 40ns /20ns 19 28ns / 20ns 11 25ns / 17ns ISL5123 1 SPDT 32 40ns /20ns 19 28ns / 20ns 11 25ns / 17ns 8 Ld SOIC, 6 Ld SOT-23
Features
* Improved (lower RON, faster switching), pin compatible replacements for ISL84541-44 * Fully specified at 3.3V, 5V, and 12V supplies * ON resistance (RON) . . . . . . . . . . . . . . . . . . . . . . . . . 19 * RON matching between channels . . . . . . . . . . . . . . . . . 1 * Low charge injection . . . . . . . . . . . . . . . . . . . . . . . 5pC (Max) * Single supply operation . . . . . . . . . . . . . . . . . +2.7V to +12V * Low power consumption (PD). . . . . . . . . . . . . . . . . . . . < 5W * Low leakage current . . . . . . . . . . . . . . . . . . . . . . . . . 10nA * Fast switching action - tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28ns - tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20ns * Guaranteed break-before-make (ISL5122/ISL5123 only) * Minimum 2000V ESD protection per method 3015.7 * TTL, CMOS compatible * Available in SOT-23 packaging
Applications
* Battery powered, handheld, and portable equipment - Cellular/mobile phones - Pagers - Laptops, notebooks, palmtops * Communications systems - Military radios - PBX, PABX * Test equipment - Ultrasound - Electrocardiograph * Heads-up displays * Audio and video switching * Various circuits - +3V/+5V DACs and ADCs - Sample and hold circuits - Digital filters - Operational amplifier gain switching networks - High frequency analog switching - High speed multiplexing - Integrator reset circuits
8 Ld SOIC, 8 Ld SOT-23
Related Literature
* Technical Brief TB363 "Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)"
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2003. All Rights Reserved
ISL5120 Pinouts
(Note 1) ISL5120 (SOIC, MSOP) TOP VIEW
NO1 1 COM1 2 IN2 3 GND 4 8 V+ 7 IN1 6 COM2 5 NO2
ISL5120 (SOT-23) TOP VIEW
NO1 1 V+ 2 IN2 3 COM2 4 8 COM1 7 IN1 6 GND 5 NO2
ISL5121 (SOIC) TOP VIEW
ISL5121 (SOT-23) TOP VIEW
NC1 1 COM1 2 IN2 3 GND 4
8 V+ 7 IN1 6 COM2 5 NC2
NC1 1 V+ 2 IN2 3 COM2 4
8 COM1 7 IN1 6 GND 5 NC2
ISL5122 (SOIC) TOP VIEW
NO1 1 COM1 2 IN2 3 GND 4 8 V+ 7 IN1 6 COM2 5 NC2
ISL5122 (SOT-23) TOP VIEW
NO1 1 V+ 2 IN2 3 COM2 4 8 COM1 7 IN1 6 GND 5 NC2
ISL5123 (SOIC) TOP VIEW
NO 1 COM 2 NC 3 GND 4 8 V+ 7 IN 6 N.C. 5 N.C.
ISL5123 (SOT-23) TOP VIEW
IN 1 V+ 2 GND 3
6 NO 5 COM 4 NC
NOTE: 1. Switches Shown for Logic "0" Input.
Truth Table
ISL5120 LOGIC 0 1 NOTE: SW 1,2 OFF ON ISL5121 SW 1,2 ON OFF ISL5122 SW 1 OFF ON SW 2 ON OFF ISL5123 PIN NC PIN NO ON OFF OFF ON
Pin Descriptions
PIN V+ GND IN COM NO NC N.C. FUNCTION System Power Supply Input (+2.7V to +12V) Ground Connection Digital Control Input Analog Switch Common Pin Analog Switch Normally Open Pin Analog Switch Normally Closed Pin No Internal Connection
Logic "0" 0.8V. Logic "1" 2.4V.
2
ISL5120 Ordering Information
PART NO. (BRAND) (NOTE 2) ISL5120CB ISL5120CU * (120C) ISL5120IB ISL5120IH-T (120I) ISL5121CB ISL5121IB ISL5121IH-T (121I) ISL5122CB ISL5122IB ISL5122IH-T (122I) ISL5123CB ISL5123IB ISL5123IH-T (123I) NOTES: 2. Most surface mount devices are available on tape and reel; add "-T" to suffix. * In Development. TEMP. RANGE (oC) 0 to 70 0 to 70 -40 to 85 -40 to 85 0 to 70 -40 to 85 -40 to 85 0 to 70 -40 to 85 -40 to 85 0 to 70 -40 to 85 -40 to 85 PACKAGE 8 Ld SOIC 8 Ld MSOP 8 Ld SOIC 8 Ld SOT-23 8 Ld SOIC 8 Ld SOIC 8 Ld SOT-23 8 Ld SOIC 8 Ld SOIC 8 Ld SOT-23 8 Ld SOIC 8 Ld SOIC 6 Ld SOT-23 PKG. NO. M8.15 M8.118 M8.15 P8.064 M8.15 M8.15 P8.064 M8.15 M8.15 P8.064 M8.15 M8.15 P6.064
3
ISL5120
Absolute Maximum Ratings
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V Input Voltages IN (Note 3). . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V) NO, NC (Note 3) . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V) Output Voltages COM (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V) Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 30mA Peak Current NO, NC, or COM (Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . . 40mA ESD Rating (Per MIL-STD-883 Method 3015). . . . . . . . . . . . . .>2kV
Thermal Information
Thermal Resistance (Typical, Note 4) JA (oC/W) 6 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . 230 8 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . 215 8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . 170 8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . . 210 Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Moisture Sensitivity (See Technical Brief TB363) All Other Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1 8 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 2 Maximum Storage Temperature Range . . . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (Lead Tips Only)
Operating Conditions
Temperature Range ISL512XCX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC ISL512XIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 3. Signals on NC, NO, COM, or IN exceeding V+ or GND are clamped by internal diodes. Limit forward diode current to maximum current ratings. 4. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications - 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5), Unless Otherwise Specified TEST CONDITIONS TEMP (oC) Full (NOTE 6) MIN 0 -0.1 -5 -0.1 -5 -0.2 -10 3 TYP 19 23 0.8 1 7 0.01 28 40 20 30 10 3 76 -105 60 8 8 (NOTE 6) MAX UNITS V+ 30 40 2 4 8 0.1 5 0.1 5 0.2 10 75 150 50 100 5 V nA nA nA nA nA nA ns ns ns ns ns pC dB dB dB pF pF
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON RON Matching Between Channels, RON RON Flatness, RFLAT(ON) NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM OFF Leakage Current, ICOM(OFF) COM ON Leakage Current, ICOM(ON) DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Break-Before-Make Time Delay (ISL5122, ISL5123), tD Charge Injection, Q OFF Isolation Crosstalk (Channel-to-Channel) Power Supply Rejection Ratio COM OFF Capacitance, CCOM(OFF)
V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 3.5V, See Figure 5 V+ = 5V, ICOM = 1.0mA, VNO or VNC= 3.5V V+ = 5V, ICOM = 1.0mA, VNO or VNC = 1V, 2V, 3V V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V, Note 7 V+ = 5.5V, VCOM = 4.5V, 1V, VNO or VNC = 1V, 4.5V, Note 7 V+ = 5.5V, VCOM = 1V, 4.5V, or VNO or VNC = 1V, 4.5V, or Floating, Note 7
25 Full 25 Full Full 25 Full 25 Full 25 Full 25 Full 25 Full Full 25 25 25 25 25 25
VNO or VNC = 3V, RL =1k, CL = 35pF, VIN = 0 to 3V, See Figure 1 VNO or VNC = 3V, RL =1k, CL = 35pF, VIN = 0 to 3V, See Figure 1 RL = 300, CL = 35pF, VNO = VNC = 3V, VIN = 0 to 3V, See Figure 3 CL = 1.0nF, VG = 0V, RG = 0, See Figure 2 RL = 50, CL = 5pF, f = 1MHz, See Figure 4 RL = 50, CL = 5pF, f = 1MHz, See Figure 6 RL = 50, CL = 5pF, f = 1MHz f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
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ISL5120
Electrical Specifications - 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5), Unless Otherwise Specified (Continued) TEST CONDITIONS f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7, ISL5120/1/2 f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7, ISL5123 POWER SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current, I+ Input Voltage Low, VINL Input Voltage High, VINH Input Current, IINH, IINL NOTES: 5. VIN = input voltage to perform proper function. 6. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 7. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at 25oC. V+ = 5.5V, VIN = 0V or V+ V+ = 5.5V, VIN = 0V or V+, all channels on or off DIGITAL INPUT CHARACTERISTICS Full Full Full 2.4 -1 0.8 1 V V A Full Full 2.7 -1 0.0001 12 1 V A TEMP (oC) 25 25 (NOTE 6) MIN TYP 21 28 (NOTE 6) MAX UNITS pF pF
PARAMETER COM ON Capacitance, CCOM(ON)
Electrical Specifications - 3.3V Supply
Test Conditions: V+ = +3.0V to +3.6V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5), Unless Otherwise Specified TEST CONDITIONS TEMP (oC) Full (NOTE 6) MIN 0 -0.1 -5 -0.1 -5 -0.2 -10 3 TYP 32 40 0.8 1 6 7 0.01 0.01 40 60 20 30 20 1 76 -105 56 8 8 (NOTE 6) MAX UNITS V+ 50 60 2 4 8 12 0.1 5 0.1 5 0.2 10 120 200 50 120 5 V nA nA nA nA nA nA ns ns ns ns ns pC dB dB dB pF pF
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON RON Matching Between Channels, RON RON Flatness, RFLAT(ON) NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM OFF Leakage Current, ICOM(OFF) COM ON Leakage Current, ICOM(ON) DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Break-Before-Make Time Delay (ISL5122, ISL5123), tD Charge Injection, Q OFF Isolation Crosstalk (Channel-to-Channel) Power Supply Rejection Ratio COM OFF Capacitance, CCOM(OFF)
V+ = 3V, ICOM = 1.0mA, VNO or VNC = 1.5V V+ = 3.3V, ICOM = 1.0mA, VNO or VNC = 1.5V V+ = 3.3V, ICOM = 1.0mA, VNO or VNC = 0.5V, 1V, 1.5V V+ = 3.6V, VCOM = 1V, 3V, VNO or VNC = 3V, 1V, Note 7 V+ = 3.6V, VCOM = 3V, 1V, VNO or VNC = 1V, 3V, Note 7 V+ = 3.6V, VCOM = 1V, 3V, or VNO or VNC = 1V, 3V, or floating, Note 7
25 Full 25 Full 25 Full 25 Full 25 Full 25 Full 25 Full 25 Full Full 25 25 25 25 25 25
VNO or VNC = 1.5V, RL =1k, CL = 35pF, VIN = 0 to 3V VNO or VNC = 1.5V, RL =1k, CL = 35pF, VIN = 0 to 3V RL = 300, CL = 35pF, VNO or VNC = 1.5V, VIN = 0 to 3V CL = 1.0nF, VG = 0V, RG = 0 RL = 50, CL = 5pF, f = 1MHz RL = 50, CL = 5pF, f = 1MHz f = 1MHz, VNO or VNC = VCOM = 0V
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V
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ISL5120
Electrical Specifications - 3.3V Supply
Test Conditions: V+ = +3.0V to +3.6V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5), Unless Otherwise Specified (Continued) TEST CONDITIONS f = 1MHz, VNO or VNC = VCOM = 0V, ISL5120/1/2 f = 1MHz, VNO or VNC = VCOM = 0V, ISL5123 POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+ Input Voltage Low, VINL Input Voltage High, VINH Input Current, IINH, IINL V+ = 3.6V, VIN = 0V or V+ V+ = 3.6V, VIN = 0V or V+, all channels on or off Full Full Full Full -1 2.4 -1 1 0.8 1 A V V A DIGITAL INPUT CHARACTERISTICS TEMP (oC) 25 25 (NOTE 6) MIN TYP 21 28 (NOTE 6) MAX UNITS pF pF
PARAMETER COM ON Capacitance, CCOM(ON)
Electrical Specifications - 12V Supply
Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, VINH = 4V, VINL = 0.8V (Note 5), Unless Otherwise Specified TEST CONDITIONS TEMP (oC) Full (NOTE 6) MIN 0 -0.1 -5 -0.1 -5 -0.2 -10 0 -1 TYP 11 15 0.8 1 1 0.01 0.01 25 35 17 26 2 5 76 -105 63 8 8 21 28 15 1 (NOTE 6) MAX UNITS V+ 20 25 2 4 4 6 0.1 5 0.1 5 0.2 10 35 55 30 50 V nA nA nA nA nA nA ns ns ns ns ns pC dB dB dB pF pF pF pF A
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON RON Matching Between Channels, RON RON Flatness, RFLAT(ON) NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM OFF Leakage Current, ICOM(OFF) COM ON Leakage Current, ICOM(ON) DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Break-Before-Make Time Delay (ISL5122, ISL5123), tD Charge Injection, Q OFF Isolation Crosstalk (Channel-to-Channel) Power Supply Rejection Ratio COM OFF Capacitance, CCOM(OFF) COM ON Capacitance, CCOM(ON)
V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 10V V+ = 12V, ICOM = 1.0mA, VNO or VNC = 10V V+ = 12V, ICOM = 1.0mA, VNO or VNC = 3V, 6V, 9V V+ = 13V, VCOM = 1V, 12V, VNO or VNC = 12V, 1V, Note 7 V+ = 13V, VCOM = 12V, 1V, VNO or VNC = 1V, 12V, Note 7 V+ = 13V, VCOM = 1V, 12V, or VNO or VNC = 1V, 12V, or floating, Note 7
25 Full 25 Full 25 Full 25 Full 25 Full 25 Full 25 Full 25 Full Full 25 25 25 25 25 25 25 25 Full
VNO or VNC = 10V, RL =1k, CL = 35pF, VIN = 0 to 4V VNO or VNC = 10V, RL =1k, CL = 35pF, VIN = 0 to 4V RL = 300, CL = 35pF, VNO or VNC = 10V, VIN = 0 to 4V CL = 1.0nF, VG = 0V, RG = 0 RL = 50, CL = 5pF, f = 1MHz RL = 50, CL = 5pF, f = 1MHz f = 1MHz, VNO or VNC = VCOM = 0V f = 1MHz, VNO or VNC = VCOM = 0V, ISL5120/1/2 f = 1MHz, VNO or VNC = VCOM = 0V, ISL5123
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V
POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+ V+ = 13V, VIN = 0V or V+, all channels on or off
6
ISL5120
Electrical Specifications - 12V Supply
Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, VINH = 4V, VINL = 0.8V (Note 5), Unless Otherwise Specified (Continued) TEST CONDITIONS TEMP (oC) Full ISL5120CX only V+ = 13V, VIN = 0V or V+ Full Full Full (NOTE 6) MIN 2.9 4 -1 TYP 3 (NOTE 6) MAX UNITS 0.8 1 V V V A
PARAMETER DIGITAL INPUT CHARACTERISTICS Input Voltage Low, VINL Input Voltage High, VINH Input Voltage High, VINH Input Current, IINH, IINL
Test Circuits and Waveforms
3V OR 4V LOGIC INPUT 50% 0V tOFF SWITCH INPUT VNO 90% SWITCH OUTPUT 0V tON SWITCH INPUT VOUT 90% LOGIC INPUT NO or NC COM IN GND RL 1k CL 35pF VOUT tr < 20ns tf < 20ns V+ C
Logic input waveform is inverted for switches that have the opposite logic sense.
Repeat test for all switches. CL includes fixture and stray capacitance. RL V OUT = V -----------------------------(NO or NC) R + R
L ( ON )
FIGURE 1A. MEASUREMENT POINTS FIGURE 1. SWITCHING TIMES
FIGURE 1B. TEST CIRCUIT
V+
C
SWITCH OUTPUT VOUT
VOUT
RG
NO or NC
COM
VOUT
V+ LOGIC INPUT ON OFF 0V Q = VOUT x CL LOGIC INPUT ON VG GND IN CL
FIGURE 2A. MEASUREMENT POINTS FIGURE 2. CHARGE INJECTION
FIGURE 2B. TEST CIRCUIT
7
ISL5120 Test Circuits and Waveforms (Continued)
V+ 3V OR 4V LOGIC INPUT 0V VNX SWITCH OUTPUT VOUT1 90% 0V IN1 RL2 300 CL2 35pF C
NO1
VOUT1 COM1 VOUT2 RL1 300 CL1 35pF
NC2
COM2
IN2 SWITCH OUTPUT VOUT2 90% 0V LOGIC INPUT GND
tD
tD
CL includes fixture and stray capacitance. FIGURE 3A. MEASUREMENT POINTS (ISL5122 ONLY) FIGURE 3B. TEST CIRCUIT (ISL5122 ONLY)
V+
C
3V OR 4V LOGIC INPUT 0V
VNX
NO
COM
NC
VOUT RL 300 CL 35pF
IN SWITCH OUTPUT VOUT 90% 0V tD LOGIC INPUT GND
CL includes fixture and stray capacitance. FIGURE 3C. MEASUREMENT POINTS (ISL5123 ONLY) FIGURE 3D. TEST CIRCUIT (ISL5123 ONLY)
FIGURE 3. BREAK-BEFORE-MAKE TIME
V+ V+ C RON = V1/1mA SIGNAL GENERATOR
NO or NC NO or NC
C
VNX INX 0V or VINH 1mA V1 IN 0.8V or VINH
ANALYZER RL
COM
COM
GND
GND
FIGURE 4. OFF ISOLATION TEST CIRCUIT
FIGURE 5. RON TEST CIRCUIT
8
ISL5120 Test Circuits and Waveforms (Continued)
V+ C V+ C SIGNAL GENERATOR
NO1 or NC1 COM1
50
NO or NC
IN1 0V or 2.4V IN2 0V or VINH INX IMPEDANCE ANALYZER
COM
0V or VINH
ANALYZER RL
COM2
NO2 or NC2
GND
NC
GND
FIGURE 6. CROSSTALK TEST CIRCUIT
FIGURE 7. CAPACITANCE TEST CIRCUIT
Detailed Description
The ISL5120-ISL5123 bidirectional, dual analog switches offer precise switching capability from a single 2.7V to 12V supply with low on-resistance (19) and high speed operation (tON = 28ns, tOFF = 20ns). The devices are especially well suited to portable battery powered equipment thanks to the low operating supply voltage (2.7V), low power consumption (5W), low leakage currents (100pA max), and the tiny SOT-23 packaging. High frequency applications also benefit from the wide bandwidth, and the very high off isolation and crosstalk rejection.
unaffected by this approach, but the switch resistance may increase, especially at low supply voltages.
OPTIONAL PROTECTION DIODE V+ OPTIONAL PROTECTION RESISTOR INX VNO or NC VCOM
Supply Sequencing And Overvoltage Protection
With any CMOS device, proper power supply sequencing is required to protect the device from excessive input currents which might permanently damage the IC. All I/O pins contain ESD protection diodes from the pin to V+ and GND (see Figure 8). To prevent forward biasing these diodes, V+ must be applied before any input signals, and input signal voltages must remain between V+ and GND. If these conditions cannot be guaranteed, then one of the following two protection methods should be employed. Logic inputs can easily be protected by adding a 1k resistor in series with the input (see Figure 8). The resistor limits the input current below the threshold that produces permanent damage, and the sub-microamp input current produces an insignificant voltage drop during normal operation. Adding a series resistor to the switch input defeats the purpose of using a low RON switch, so two small signal diodes can be added in series with the supply pins to provide overvoltage protection for all pins (see Figure 8). These additional diodes limit the analog signal from 1V below V+ to 1V above GND. The low leakage current performance is 9
GND OPTIONAL PROTECTION DIODE
FIGURE 8. OVERVOLTAGE PROTECTION
Power-Supply Considerations
The ISL512X construction is typical of most CMOS analog switches, except that they have only two supply pins: V+ and GND. V+ and GND drive the internal CMOS switches and set their analog voltage limits. Unlike switches with a 13V maximum supply voltage, the ISL512X 15V maximum supply voltage provides plenty of room for the 10% tolerance of 12V supplies, as well as room for overshoot and noise spikes. The minimum recommended supply voltage is 2.7V. It is important to note that the input signal range, switching times, and on-resistance degrade at lower supply voltages. Refer to the electrical specification tables and Typical Performance curves for details.
ISL5120
V+ and GND also power the internal logic and level shifters. The level shifters convert the input logic levels to switched V+ and GND signals to drive the analog switch gate terminals. This family of switches cannot be operated with bipolar supplies, because the input switching point becomes negative in this configuration. the resistance to this feedthrough, while Crosstalk indicates the amount of feedthrough from one switch to another. Figure 17 details the high Off Isolation and Crosstalk rejection provided by this family. At 10MHz, Off Isolation is about 50dB in 50 systems, decreasing approximately 20dB per decade as frequency increases. Higher load impedances decrease Off Isolation and Crosstalk rejection due to the voltage divider action of the switch OFF impedance and the load impedance.
Logic-Level Thresholds
This switch family is TTL compatible (0.8V and 2.4V) over a supply range of 3V to 11V (see Figure 15). At 12V the VIH level is about 2.5V. This is still below the TTL guaranteed high output minimum level of 2.8V, but noise margin is reduced. For best results with a 12V supply, use a logic family the provides a VOH greater than 3V. The digital input stages draw supply current whenever the digital input voltage is not at one of the supply rails. Driving the digital input signals from GND to V+ with a fast transition time minimizes power dissipation.
Leakage Considerations
Reverse ESD protection diodes are internally connected between each analog-signal pin and both V+ and GND. One of these diodes conducts if any analog signal exceeds V+ or GND. Virtually all the analog leakage current comes from the ESD diodes to V+ or GND. Although the ESD diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. Each is biased by either V+ or GND and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the V+ and GND pins constitutes the analogsignal-path leakage current. All analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of the same or opposite polarity. There is no connection between the analog signal paths and V+ or GND.
High-Frequency Performance
In 50 systems, signal response is reasonably flat even past 300MHz (see Figure 16). Figure 16 also illustrates that the frequency response is very consistent over a wide V+ range, and for varying analog signal levels. An OFF switch acts like a capacitor and passes higher frequencies with less attenuation, resulting in signal feedthrough from a switch's input to its output. Off Isolation is
Typical Performance Curves TA = 25oC, Unless Otherwise Specified
40 35 30 85oC RON () 25 RON () 20 15 10 5 3 4 5 6 7 8 V+ (V) 9 10 11 12 13 25oC -40oC 45 40 35 30 25 20 15 30 25 20 15 10 20 15 10 5 0 -40oC 2 4 6 VCOM (V) 8 10 12 85oC 85oC 25oC -40oC V+ = 5V 85oC 25oC -40oC 25oC V+ = 12V V+ = 3.3V
FIGURE 9. ON RESISTANCE vs SUPPLY VOLTAGE
FIGURE 10. ON RESISTANCE vs SWITCH VOLTAGE
10
ISL5120 Typical Performance Curves TA = 25oC, Unless Otherwise Specified (Continued)
0.5 0.4 0.3 0.2 0.1 0 0.25 0.2 0.15 0.1 0.05 0 0.15 0.1 0.05 0 0 2 4 6 VCOM (V) 8 10 12 85oC 40 -40oC 30 Q (pC) V+ = 5V 25oC 85oC -40oC 25oC -40oC 85oC -40oC V+ = 12V 25oC 85oC 20 10 V+ = 3.3V 0 -10 -20 0 2 4 6 VCOM (V) 8 10 12 V+ = 5V V+ = 12V V+ = 3.3V 25oC 60 50
RON ()
FIGURE 11. RON MATCH vs SWITCH VOLTAGE
100 90 80 70 tON (ns) 60 85oC 50
FIGURE 12. CHARGE INJECTION vs SWITCH VOLTAGE
35
30 85oC tOFF (ns)
25 -40oC
-40oC 40 30 25oC 20 2 3 4 5 6 7 V+ (V) 8 9 10 11 12 15 2 3 4 5 6 7 V+ (V) 8 9 -40oC 20
25oC
10
11
12
FIGURE 13. TURN - ON TIME vs SUPPLY VOLTAGE
FIGURE 14. TURN - OFF TIME vs SUPPLY VOLTAGE
NORMALIZED GAIN (dB)
3.0
V+ = 3.3V to 12V 0 -3 -6 PHASE 0 20 PHASE (DEGREES) GAIN
2.5 VINH VINH AND VINL (V) 2.0 -40oC 85oC
1.5
25oC -40oC 25oC VINL 85oC
85oC
40 60
1.0
0.5 2 3 4 5 6 7 8 V+ (V) 9 10 11 12 13 1
RL = 50 VIN = 0.2VP-P to 2.5VP-P (V+ = 3.3V) VIN = 0.2VP-P to 4VP-P (V+ = 5V) VIN = 0.2VP-P to 5VP-P (V+ = 12V) 10 100 FREQUENCY (MHz)
80 100 600
FIGURE 15. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE
FIGURE 16. FREQUENCY RESPONSE
11
ISL5120 Typical Performance Curves TA = 25oC, Unless Otherwise Specified (Continued)
-10 V+ = 3V to 13V -20 -30 -40 CROSSTALK (dB) -50 -60 -70 -80 -90 CROSSTALK -100 -110 1k 100 110 100M 500M 80 0.3 1 10 FREQUENCY (MHz) 100 1000 ISOLATION 20 30 OFF ISOLATION (dB) 40 50 60 70 80 90 0 10 V+ = 3.3V, SWITCH OFF 20 PSRR (dB) 30 40 50 60 70 V+ = 3.3V, SWITCH ON V+ = 12V, SWITCH ON V+ = 12V, SWITCH OFF 10 RL = 50
10k
100k
1M
10M
FREQUENCY (Hz)
FIGURE 17. CROSSTALK AND OFF ISOLATION
FIGURE 18. PSRR vs FREQUENCY
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP): GND TRANSISTOR COUNT: ISL5120: 66 ISL5121: 66 ISL5122: 66 ISL5123: 58 PROCESS: Si Gate CMOS
12
ISL5120 Small Outline Plastic Packages (SOIC)
N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45o H 0.25(0.010) M BM
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A
L
MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00 NOTES 9 3 4 5 6 7 8o Rev. 0 12/93
MIN 0.0532 0.0040 0.013 0.0075 0.1890 0.1497
MAX 0.0688 0.0098 0.020 0.0098 0.1968 0.1574
A1 B C D E
A1 0.10(0.004) C
e H h L N
0.050 BSC 0.2284 0.0099 0.016 8 0o 8o 0.2440 0.0196 0.050
1.27 BSC 5.80 0.25 0.40 8 0o 6.20 0.50 1.27
e
B 0.25(0.010) M C AM BS
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
13
ISL5120 Mini Small Outline Plastic Packages (MSOP)
N INDEX AREA E E1 -B1 2 3 L 0.05(0.002) -AD -CSEATING PLANE A 0.25 0.010 GAUGE PLANE 0.25(0.010) M BM
M8.118
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 A2 b c D MIN 0.037 0.002 0.030 0.010 0.005 0.116 0.116 MAX 0.043 0.006 0.037 0.014 0.007 0.120 0.120 MILLIMETERS MIN 0.94 0.05 0.75 0.25 0.13 2.95 2.95 MAX 1.10 0.15 0.95 0.36 0.18 3.05 3.05 NOTES 9 3 4 6 7 6o Rev. 1 12/02
A1 0.10(0.004) A2 c
E1 e E L N
e
b 0.10(0.004) M C AM BS
0.026 BSC 0.188 0.016 8 0o 6o 0.198 0.026
0.65 BSC 4.78 0.41 8 0o 5.03 0.66
NOTES: 1. These package dimensions are within allowable dimensions of JEDEC MO-187AA 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E1" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension "b" does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of "b" dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only
14
ISL5120 Small Outline Transistor Plastic Packages (SOT23-6)
0.20 (0.008) M C L b C
P6.064
6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE INCHES
L
e SYMBOL A A1
E C L E1
MILLIMETERS MIN 0.90 0.00 0.90 0.35 0.09 2.80 2.60 1.50 MAX 1.45 0.15 1.30 0.50 0.20 3.00 3.00 1.75 NOTES 3 3 4, 5 6 10o Rev. 1 2/98
MIN 0.036 0.000 0.036 0.0138 0.0036 0.111 0.103 0.060
MAX 0.057 0.0059 0.051 0.0196 0.0078 0.118 0.118 0.068
6 C L 1
5
4
A2 b C
2
3
e1
D C L
C
D E E1 e e1
0.0374 Ref 0.0748 Ref 0.004 6 0o 10o 0o 0.023
0.95 Ref 1.90 Ref 0.10 6 0.60
A
A2
A1
SEATING PLANE -C-
L N
0.10 (0.004) C
NOTES: 1. Dimensioning and tolerances per ANSI 14.5M-1982. 2. Package conforms to EIAJ SC-74 (1992). 3. Dimensions D and E1 are exclusive of mold flash, protrusions, or gate burrs. 4. Footlength L measured at reference to seating plane. 5. "L" is the length of flat foot surface for soldering to substrate. 6. "N" is the number of terminal positions. 7. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
15
ISL5120 Small Outline Transistor Plastic Packages (SOT23-8)
0.20 (0.008) M C L b C
P8.064
8 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE INCHES
L
e SYMBOL A
MILLIMETERS MIN 0.90 0.00 0.90 0.28 0.09 2.80 2.60 1.50 MAX 1.45 0.15 1.30 0.45 0.20 3.00 3.00 1.75 NOTES 3 3 4, 5 6 10o Rev. 1 10/01
MIN 0.036 0.000 0.036 0.011 0.0036 0.111 0.103 0.060
MAX 0.057 0.0059 0.051 0.018 0.0078 0.118 0.118 0.068
8 C L 1
7
6
5 E C L E1
A1 A2 b
2
3
4
C D e1
D C L
C
E E1 e e1
0.0256 Ref 0.0768 Ref 0.012 8 0o 10o 0o 0.020
0.65 Ref 1.95 Ref 0.30 8 0.50
A
A2
A1
SEATING PLANE -C-
L N
0.10 (0.004) C
NOTES: 1. Dimensioning and tolerances per ANSI 14.5M-1982. 2. Package patterned after EIAJ SC-74 (1992). 3. Dimensions D and E1 are exclusive of mold flash, protrusions, or gate burrs. 4. Footlength L measured at reference to seating plane. 5. "L" is the length of flat foot surface for soldering to substrate. 6. "N" is the number of terminal positions. 7. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only.
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